TSMC CoWoS, Foundry Capacity and AI Chip Supply — 2026-09-02
TSMC’s advanced packaging capacity remains the primary bottleneck for AI chip supply, with a persistent 10% supply-demand gap despite a ninefold increase in CoWoS output over three years. At SEMICON Taiwan 2026, industry leaders highlighted the shift of constraints from wafer starts to packaging and interconnects, while TSMC’s Arizona fab crossed 4% of group sales as overseas capacity ramps up.
TSMC CoWoS, Foundry Capacity and AI Chip Supply — 2026-09-02
Top developments
TSMC Delays 2027 Equipment Orders to Pivot to Next-Gen Packaging
TSMC has reportedly delayed placing orders for 2027 advanced packaging equipment, sparking speculation about potential excess CoWoS capacity. However, equipment suppliers confirm that CoWoS demand has not weakened; instead, TSMC is prioritizing the mass-production readiness of its next-generation packaging technologies, such as CoPoS (Chip-on-Panel-on-Substrate). This strategic pause suggests TSMC is optimizing its capital allocation toward higher-value, larger-size packaging solutions required by next-gen AI accelerators.

CoWoS Capacity Grew 9x in Three Years Yet Shortage Remains
Despite expanding monthly CoWoS production capacity roughly ninefold in three years, TSMC still faces a supply-demand gap of approximately 10%. The constraint is no longer just wafer starts but physical limits on yield and the complexity of interconnects. This gap indicates that while TSMC is aggressively scaling capacity (targeting ~120,000–130,000 wafers per month by end-2026), demand from AI customers like NVIDIA and AMD continues to outpace even this rapid expansion.

SEMICON Taiwan 2026 Highlights Interconnects as New AI Bottleneck
SEMICON Taiwan 2026 opened on August 31 with over 100,000 attendees, focusing heavily on advanced packaging and co-packaged optics (CPO). Industry experts noted that while wafer capacity has expanded, the bottleneck for AI chips has shifted to the "wires connecting them"—specifically high-bandwidth interconnects and CPO technology. This shift underscores the critical role of OSATs (Outsourced Semiconductor Assembly and Test) and materials suppliers in the AI supply chain.

TSMC Arizona Fab Crosses 4% of Group Sales
TSMC’s Arizona fab has crossed 4% of the company’s total group sales, reflecting the rapid ramp-up of US-based production. In Q2, the Arizona site generated revenue topping NT$40 billion, although profits slipped below NT$19 billion due to initial ramp-up costs. This milestone demonstrates that overseas fabs are becoming significant contributors to TSMC’s bottom line, driven by strong AI chip demand from US customers.

Local view
At the SEMICON Taiwan Master Forum, MediaTek CEO Rick Tsai (Tsai Ming-kai) humorously pleaded for more capacity from TSMC and ASE Group, highlighting the intense competition for advanced packaging slots. He specifically addressed TSMC’s Cliff Hou and ASE’s Tien Wu, asking for increased capacity for 2027–2029 to meet AI and HPC demands. This public plea underscores the tightness of the supply chain, where even major fabless players are struggling to secure sufficient packaging capacity for their next-generation chips.
Additionally, local analysts note that the key to shipping AI chips has shifted from wafer capacity to ABF substrates and CoWoS/OSAT testing. Six major ABF substrate suppliers have already booked their 2026 capacity, creating a new layer of competition in the supply chain.
Context & numbers
- CoWoS Capacity: TSMC’s monthly CoWoS capacity is projected to reach 120,000–140,000 wafers by end-2026, up from ~75,000–80,000 earlier in the year.
- Supply-Demand Gap: The gap between CoWoS supply and demand is narrowing from 20% to ~10% by end-2026 but remains a critical constraint.
- Capex: TSMC raised its 2026 capital expenditure guidance to $60–$64 billion, with a significant portion allocated to advanced packaging and 2nm/3nm capacity.
- Foundry Market Share: TSMC held a 73% share of the global pure-play foundry market in Q2 2026, driven by AI-related orders.
On the radar
- NVIDIA Earnings: Upcoming NVIDIA earnings will be a key test for AI chip demand confidence, directly impacting TSMC’s order book.
- CoPoS Mass Production: Watch for updates on TSMC’s CoPoS (Chip-on-Panel-on-Substrate) yield rates and timeline for mass production, which is critical for next-gen large-die AI chips.
- ABF Substrate Pricing: With capacity fully booked, watch for price increases in ABF substrates, which could impact the overall cost structure of AI accelerators.
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